As a semiconductor memory device becomes highly integrated, an area for forming each capacitor in the semiconductor device becomes small and it becomes difficult to obtain a desired capacitor area. Therefore, recently, a high dielectric constant thin film capacitor is researched in which high dielectric constant material comprising BST, i.e, Ba.sub.x Sr.sub.1-x TiO.sub.3 (0.ltoreq.x.ltoreq.1); PZT, i.e., PbZr.sub.1-y Ti.sub.y O.sub.3 (0.ltoreq.y.ltoreq.1); and the like is used as a material of a dielectric film, and noble metal is used as upper and lower electrodes.
Here, a description will be made on an example of a conventional method of manufacturing such high dielectric constant thin film capacitor. First, on a silicon substrate in which a MOSFET is fabricated by a known method, an insulating film comprising SiO.sub.2 is formed by using a CVD method and the like. Then, a capacitor contact plug comprising polysilicon is formed in the insulating film. A barrier layer made of a stacked structure of TiN/Ti and a lower electrode layer comprising noble metal such as ruthenium (Ru) are formed by using a sputtering method. The barrier layer and the lower electrode layer are then patterned into a desired shape by using RIE (Reactive Ion Etching). Then, a thin film of (Ba, Sr)TiO.sub.3 is formed on whole surface of the substrate by using an ECR (Electron Cyclotron Resonance)--MOCVD (Metal Organic Chemical Vapor Deposition) method, at a substrate temperature of 200 degrees Celsius. Thereafter, the (Ba, Sr)TiO.sub.3 film is crystallized by an RTA (Rapid Thermal Annealing) process in nitrogen atmosphere. An upper electrode layer comprising noble metal such as Ru and the like is formed and a (Ba, Sr)TiO.sub.3 thin film capacitor is obtained. Then, a process for surface protection such as formation of a passivation film and the like is performed by using a known method.
After forming a gate oxide film on a silicon substrate, various process steps are performed to fabricate a transistor. During such various process steps, there is a possibility that structural defects arise between the silicon substrate and the gate oxide film, or that chemical bonds between silicon and oxygen in the gate oxide film are broken. Therefore, there is a possibility that transistor characteristics are deteriorated. In order to recover or improve transistor characteristics, after forming a semiconductor memory device, the semiconductor memory device is usually annealed at a temperature approximately between 300 and 400 degrees Celsius, in an atmosphere of a mixed gas of hydrogen and nitrogen in which a concentration of hydrogen is 3 to 50 percent.
However, the inventor of the present invention has found that, when such annealing process is performed in an atmosphere including hydrogen, local crystallinity is deteriorated at interfaces between the upper electrode and the BST thin film and between the lower electrode and the BST thin film in the capacitor and, thereby, a leak current of the capacitor increases. FIG. 5 shows relationship between voltages applied to capacitors, i.e., upper electrode voltages with respect to lower electrode voltages, and leakage current densities of the capacitors, i.e., densities of leakage current between the upper electrodes and the lower electrodes, when capacitors are annealed, at a temperature of 400 degrees Celsius, in an atmosphere of mixed gases of hydrogen and nitrogen in which concentrations of hydrogen are 5 percent, 20 percent and 50 percent. FIG. 5, also shows relationship designated as "as-fab." between voltages applied to a capacitor and leakage current densities of the capacitor, when the capacitor is not annealed after fabrication. As can be seen from FIG. 5, in case the capacitor is annealed in an atmosphere including hydrogen, the leakage current increases in every hydrogen concentration, when compared with the case the capacitor is not annealed.